Project Ne10
An open, optimized software library for the ARM architecture.
Macros | Functions
NE10_fft_int32.neonintrinsic.c File Reference
#include <arm_neon.h>
#include "NE10_types.h"
#include "NE10_macros.h"
#include "NE10_fft.h"
#include "NE10_dsp.h"

Go to the source code of this file.

Macros

#define FFT4_FS_START
 
#define FFT4_FS
 
#define FFT4_FS_SCALED
 
#define FFT4_FWD_LS
 
#define FFT4_INV_LS
 
#define FFT8_FS_START
 
#define FFT8_FS
 
#define FFT8_FS_SCALED
 
#define FFT8_FWD_LS
 
#define FFT8_INV_LS
 
#define FFT16_FS_START
 
#define FFT16_LS_START
 
#define FFT16_FS
 
#define FFT16_FS_SCALED
 
#define FFT16_LS_LOAD
 
#define FFT16_FWD_LS
 
#define FFT16_INV_LS
 
#define FFT16_FWD_LS_S0
 
#define FFT16_INV_LS_S0
 
#define FFT16_LS_02
 
#define FFT16_LS_02_SCALED
 
#define FFT16_ST
 
#define RADIX8x4_START
 
#define RADIX8x4_LOAD
 
#define RADIX8x4_STORE
 
#define RADIX8x4_FS_S0
 
#define RADIX8x4_FWD_S357
 
#define RADIX8x4_INV_S357
 
#define RADIX8x4_LS_02
 
#define RADIX8x4_FS_S0_SCALED
 
#define RADIX8x4_LS_02_SCALED
 
#define RADIX4x4_WITHOUT_TW_START
 
#define RADIX4x4_WITHOUT_TW_LOAD
 
#define RADIX4x4_WITHOUT_TW_STORE
 
#define RADIX4x4_WITHOUT_TW_S0
 
#define RADIX4x4_WITHOUT_TW_S0_SCALED
 
#define RADIX4x4_WITH_TW_START
 
#define RADIX4x4_WITH_TW_LOAD
 
#define RADIX4x4_WITH_TW_STORE
 
#define RADIX4x4_WITH_TW_S1_FWD
 
#define RADIX4x4_WITH_TW_S1_INV
 
#define RADIX4x4_WITH_TW_LS_02
 
#define RADIX4x4_WITH_TW_LS_02_SCALED
 
#define ne10_mixed_radix_fft_forward_int32_neon(scaled)
 
#define ne10_mixed_radix_fft_backward_int32_neon(scaled)
 

Functions

 ne10_mixed_radix_fft_forward_int32_neon (ne10_mixed_radix_fft_forward_int32_neon(scaled) ne10_mixed_radix_fft_backward_int32_neon() ne10_mixed_radix_fft_backward_int32_neon(scaled) static void ne10_fft_split_r2c_1d_int32_neon(ne10_fft_cpx_int32_t *dst unscaled)
 
void ne10_fft_c2c_1d_int32_neon (ne10_fft_cpx_int32_t *fout, ne10_fft_cpx_int32_t *fin, ne10_fft_cfg_int32_t cfg, ne10_int32_t inverse_fft, ne10_int32_t scaled_flag)
 Specific implementation of ne10_fft_c2c_1d_int32 using NEON SIMD capabilities. More...
 
void ne10_fft_r2c_1d_int32_neon (ne10_fft_cpx_int32_t *fout, ne10_int32_t *fin, ne10_fft_r2c_cfg_int32_t cfg, ne10_int32_t scaled_flag)
 Specific implementation of ne10_fft_r2c_1d_int32 using NEON SIMD capabilities. More...
 
void ne10_fft_c2r_1d_int32_neon (ne10_int32_t *fout, ne10_fft_cpx_int32_t *fin, ne10_fft_r2c_cfg_int32_t cfg, ne10_int32_t scaled_flag)
 Specific implementation of ne10_fft_c2r_1d_int32 using NEON SIMD capabilities. More...
 

Macro Definition Documentation

#define FFT16_FS
Value:
p_src0 = (int32_t*) (& (Fin[0])); \
p_src4 = (int32_t*) (& (Fin[4])); \
p_src8 = (int32_t*) (& (Fin[8])); \
p_src12 = (int32_t*) (& (Fin[12])); \
q2_in_0123 = vld2q_s32 (p_src0); \
q2_in_4567 = vld2q_s32 (p_src4); \
q2_in_89ab = vld2q_s32 (p_src8); \
q2_in_cdef = vld2q_s32 (p_src12); \
q_t2_r = vsubq_s32 (q2_in_0123.val[0], q2_in_89ab.val[0]); \
q_t2_i = vsubq_s32 (q2_in_0123.val[1], q2_in_89ab.val[1]); \
q_t3_r = vaddq_s32 (q2_in_0123.val[0], q2_in_89ab.val[0]); \
q_t3_i = vaddq_s32 (q2_in_0123.val[1], q2_in_89ab.val[1]); \
q_t0_r = vaddq_s32 (q2_in_4567.val[0], q2_in_cdef.val[0]); \
q_t0_i = vaddq_s32 (q2_in_4567.val[1], q2_in_cdef.val[1]); \
q_t1_r = vsubq_s32 (q2_in_4567.val[0], q2_in_cdef.val[0]); \
q_t1_i = vsubq_s32 (q2_in_4567.val[1], q2_in_cdef.val[1]); \
q_out_r26ae = vsubq_s32 (q_t3_r, q_t0_r); \
q_out_i26ae = vsubq_s32 (q_t3_i, q_t0_i); \
q_out_r048c = vaddq_s32 (q_t3_r, q_t0_r); \
q_out_i048c = vaddq_s32 (q_t3_i, q_t0_i);

Definition at line 291 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_FS_SCALED
Value:
p_src0 = (int32_t*) (& (Fin[0])); \
p_src4 = (int32_t*) (& (Fin[4])); \
p_src8 = (int32_t*) (& (Fin[8])); \
p_src12 = (int32_t*) (& (Fin[12])); \
q2_in_0123 = vld2q_s32 (p_src0); \
q2_in_4567 = vld2q_s32 (p_src4); \
q2_in_89ab = vld2q_s32 (p_src8); \
q2_in_cdef = vld2q_s32 (p_src12); \
q_t2_r = vhsubq_s32 (q2_in_0123.val[0], q2_in_89ab.val[0]); \
q_t2_i = vhsubq_s32 (q2_in_0123.val[1], q2_in_89ab.val[1]); \
q_t3_r = vhaddq_s32 (q2_in_0123.val[0], q2_in_89ab.val[0]); \
q_t3_i = vhaddq_s32 (q2_in_0123.val[1], q2_in_89ab.val[1]); \
q_t0_r = vhaddq_s32 (q2_in_4567.val[0], q2_in_cdef.val[0]); \
q_t0_i = vhaddq_s32 (q2_in_4567.val[1], q2_in_cdef.val[1]); \
q_t1_r = vhsubq_s32 (q2_in_4567.val[0], q2_in_cdef.val[0]); \
q_t1_i = vhsubq_s32 (q2_in_4567.val[1], q2_in_cdef.val[1]); \
q_out_r26ae = vhsubq_s32 (q_t3_r, q_t0_r); \
q_out_i26ae = vhsubq_s32 (q_t3_i, q_t0_i); \
q_out_r048c = vhaddq_s32 (q_t3_r, q_t0_r); \
q_out_i048c = vhaddq_s32 (q_t3_i, q_t0_i);

Definition at line 313 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_FS_START
Value:
ne10_fft_cpx_int32_t *tw1, *tw2, *tw3; \
int32_t *p_src0, *p_src4, *p_src8, *p_src12; \
int32x4x2_t q2_in_0123, q2_in_4567, q2_in_89ab, q2_in_cdef; \
int32x4_t q_t0_r, q_t0_i, q_t1_r, q_t1_i, q_t2_r, q_t2_i, q_t3_r, q_t3_i; \
int32x4_t q_out_r048c, q_out_i048c, q_out_r159d, q_out_i159d; \
int32x4_t q_out_r26ae, q_out_i26ae, q_out_r37bf, q_out_i37bf;
ne10_fft_cpx_int32_t
Structure for the 32-bit fixed point FFT function.
Definition: NE10_types.h:325

Definition at line 271 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_FWD_LS
Value:
q_s0_r = vqrdmulhq_s32 (q_in_r4567, q2_tw1.val[0]); \
q_s0_i = vqrdmulhq_s32 (q_in_r4567, q2_tw1.val[1]); \
q_s1_r = vqrdmulhq_s32 (q_in_r89ab, q2_tw2.val[0]); \
q_s1_i = vqrdmulhq_s32 (q_in_r89ab, q2_tw2.val[1]); \
q_s2_r = vqrdmulhq_s32 (q_in_rcdef, q2_tw3.val[0]); \
q_s2_i = vqrdmulhq_s32 (q_in_rcdef, q2_tw3.val[1]); \
q_tmp0 = vqrdmulhq_s32 (q_in_i4567, q2_tw1.val[1]); \
q_tmp1 = vqrdmulhq_s32 (q_in_i4567, q2_tw1.val[0]); \
q_tmp2 = vqrdmulhq_s32 (q_in_i89ab, q2_tw2.val[1]); \
q_tmp3 = vqrdmulhq_s32 (q_in_i89ab, q2_tw2.val[0]); \
q_tmp4 = vqrdmulhq_s32 (q_in_icdef, q2_tw3.val[1]); \
q_tmp5 = vqrdmulhq_s32 (q_in_icdef, q2_tw3.val[0]);

Definition at line 362 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_FWD_LS_S0
Value:
q_s0_r = vsubq_s32 (q_s0_r, q_tmp0); \
q_s0_i = vaddq_s32 (q_s0_i, q_tmp1); \
q_s1_r = vsubq_s32 (q_s1_r, q_tmp2); \
q_s1_i = vaddq_s32 (q_s1_i, q_tmp3); \
q_s2_r = vsubq_s32 (q_s2_r, q_tmp4); \
q_s2_i = vaddq_s32 (q_s2_i, q_tmp5);

Definition at line 390 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_INV_LS
Value:
q_s0_r = vqrdmulhq_s32 (q_in_r4567, q2_tw1.val[0]); \
q_s0_i = vqrdmulhq_s32 (q_in_i4567, q2_tw1.val[0]); \
q_s1_r = vqrdmulhq_s32 (q_in_r89ab, q2_tw2.val[0]); \
q_s1_i = vqrdmulhq_s32 (q_in_i89ab, q2_tw2.val[0]); \
q_s2_r = vqrdmulhq_s32 (q_in_rcdef, q2_tw3.val[0]); \
q_s2_i = vqrdmulhq_s32 (q_in_icdef, q2_tw3.val[0]); \
q_tmp0 = vqrdmulhq_s32 (q_in_i4567, q2_tw1.val[1]); \
q_tmp1 = vqrdmulhq_s32 (q_in_r4567, q2_tw1.val[1]); \
q_tmp2 = vqrdmulhq_s32 (q_in_i89ab, q2_tw2.val[1]); \
q_tmp3 = vqrdmulhq_s32 (q_in_r89ab, q2_tw2.val[1]); \
q_tmp4 = vqrdmulhq_s32 (q_in_icdef, q2_tw3.val[1]); \
q_tmp5 = vqrdmulhq_s32 (q_in_rcdef, q2_tw3.val[1]);

Definition at line 376 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_INV_LS_S0
Value:
q_s0_r = vaddq_s32 (q_s0_r, q_tmp0); \
q_s0_i = vsubq_s32 (q_s0_i, q_tmp1); \
q_s1_r = vaddq_s32 (q_s1_r, q_tmp2); \
q_s1_i = vsubq_s32 (q_s1_i, q_tmp3); \
q_s2_r = vaddq_s32 (q_s2_r, q_tmp4); \
q_s2_i = vsubq_s32 (q_s2_i, q_tmp5);

Definition at line 398 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_LS_02
Value:
q_s5_r = vsubq_s32 (q_in_r0123, q_s1_r); \
q_s5_i = vsubq_s32 (q_in_i0123, q_s1_i); \
q2_out_0123.val[0] = vaddq_s32 (q_in_r0123, q_s1_r); \
q2_out_0123.val[1] = vaddq_s32 (q_in_i0123, q_s1_i); \
q_s3_r = vaddq_s32 (q_s0_r, q_s2_r); \
q_s3_i = vaddq_s32 (q_s0_i, q_s2_i); \
q_s4_r = vsubq_s32 (q_s0_r, q_s2_r); \
q_s4_i = vsubq_s32 (q_s0_i, q_s2_i); \
q2_out_89ab.val[0] = vsubq_s32 (q2_out_0123.val[0], q_s3_r); \
q2_out_89ab.val[1] = vsubq_s32 (q2_out_0123.val[1], q_s3_i); \
q2_out_0123.val[0] = vaddq_s32 (q2_out_0123.val[0], q_s3_r); \
q2_out_0123.val[1] = vaddq_s32 (q2_out_0123.val[1], q_s3_i);

Definition at line 406 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_LS_02_SCALED
Value:
q_s5_r = vhsubq_s32 (q_in_r0123, q_s1_r); \
q_s5_i = vhsubq_s32 (q_in_i0123, q_s1_i); \
q2_out_0123.val[0] = vhaddq_s32 (q_in_r0123, q_s1_r); \
q2_out_0123.val[1] = vhaddq_s32 (q_in_i0123, q_s1_i); \
q_s3_r = vhaddq_s32 (q_s0_r, q_s2_r); \
q_s3_i = vhaddq_s32 (q_s0_i, q_s2_i); \
q_s4_r = vhsubq_s32 (q_s0_r, q_s2_r); \
q_s4_i = vhsubq_s32 (q_s0_i, q_s2_i); \
q2_out_89ab.val[0] = vhsubq_s32 (q2_out_0123.val[0], q_s3_r); \
q2_out_89ab.val[1] = vhsubq_s32 (q2_out_0123.val[1], q_s3_i); \
q2_out_0123.val[0] = vhaddq_s32 (q2_out_0123.val[0], q_s3_r); \
q2_out_0123.val[1] = vhaddq_s32 (q2_out_0123.val[1], q_s3_i);

Definition at line 421 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_LS_LOAD
Value:
tw1 = twiddles; \
tw2 = twiddles + 4; \
tw3 = twiddles + 8; \
p_dst0 = (int32_t*) (&Fout[0]); \
p_dst1 = (int32_t*) (&Fout[4]); \
p_dst2 = (int32_t*) (&Fout[8]); \
p_dst3 = (int32_t*) (&Fout[12]); \
p_tw1 = (int32_t*) tw1; \
p_tw2 = (int32_t*) tw2; \
p_tw3 = (int32_t*) tw3; \
q2_tmp_0 = vzipq_s32 (q_out_r048c, q_out_r159d); \
q2_tmp_1 = vzipq_s32 (q_out_i048c, q_out_i159d); \
q2_tmp_2 = vzipq_s32 (q_out_r26ae, q_out_r37bf); \
q2_tmp_3 = vzipq_s32 (q_out_i26ae, q_out_i37bf); \
q_in_r0123 = vcombine_s32 (vget_low_s32 (q2_tmp_0.val[0]), vget_low_s32 (q2_tmp_2.val[0])); \
q_in_i0123 = vcombine_s32 (vget_low_s32 (q2_tmp_1.val[0]), vget_low_s32 (q2_tmp_3.val[0])); \
q_in_r4567 = vcombine_s32 (vget_high_s32 (q2_tmp_0.val[0]), vget_high_s32 (q2_tmp_2.val[0])); \
q_in_i4567 = vcombine_s32 (vget_high_s32 (q2_tmp_1.val[0]), vget_high_s32 (q2_tmp_3.val[0])); \
q_in_r89ab = vcombine_s32 (vget_low_s32 (q2_tmp_0.val[1]), vget_low_s32 (q2_tmp_2.val[1])); \
q_in_i89ab = vcombine_s32 (vget_low_s32 (q2_tmp_1.val[1]), vget_low_s32 (q2_tmp_3.val[1])); \
q_in_rcdef = vcombine_s32 (vget_high_s32 (q2_tmp_0.val[1]), vget_high_s32 (q2_tmp_2.val[1])); \
q_in_icdef = vcombine_s32 (vget_high_s32 (q2_tmp_1.val[1]), vget_high_s32 (q2_tmp_3.val[1])); \
q2_tw1 = vld2q_s32 (p_tw1); \
q2_tw2 = vld2q_s32 (p_tw2); \
q2_tw3 = vld2q_s32 (p_tw3);

Definition at line 335 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_LS_START
Value:
int32_t *p_dst0, *p_dst1, *p_dst2, *p_dst3; \
int32_t *p_tw1, *p_tw2, *p_tw3; \
int32x4_t q_s0_r, q_s0_i, q_s1_r, q_s1_i, q_s2_r, q_s2_i; \
int32x4_t q_s3_r, q_s3_i, q_s4_r, q_s4_i, q_s5_r, q_s5_i; \
int32x4x2_t q2_tmp_0, q2_tmp_1, q2_tmp_2, q2_tmp_3; \
int32x4_t q_in_r0123, q_in_r4567, q_in_r89ab, q_in_rcdef; \
int32x4_t q_in_i0123, q_in_i4567, q_in_i89ab, q_in_icdef; \
int32x4x2_t q2_tw1, q2_tw2, q2_tw3; \
int32x4_t q_tmp0, q_tmp1, q_tmp2, q_tmp3, q_tmp4, q_tmp5; \
int32x4x2_t q2_out_0123, q2_out_4567, q2_out_89ab, q2_out_cdef;

Definition at line 279 of file NE10_fft_int32.neonintrinsic.c.

#define FFT16_ST
Value:
vst2q_s32 (p_dst0, q2_out_0123); \
vst2q_s32 (p_dst1, q2_out_4567); \
vst2q_s32 (p_dst2, q2_out_89ab); \
vst2q_s32 (p_dst3, q2_out_cdef);

Definition at line 435 of file NE10_fft_int32.neonintrinsic.c.

#define FFT4_FS
Value:
s2_r = Fin[0].r - Fin[2].r; \
s2_i = Fin[0].i - Fin[2].i; \
tmp_r = Fin[0].r + Fin[2].r; \
tmp_i = Fin[0].i + Fin[2].i; \
s0_r = Fin[1].r + Fin[3].r; \
s0_i = Fin[1].i + Fin[3].i; \
s1_r = Fin[1].r - Fin[3].r; \
s1_i = Fin[1].i - Fin[3].i;

Definition at line 44 of file NE10_fft_int32.neonintrinsic.c.

#define FFT4_FS_SCALED
Value:
s2_r = (Fin[0].r - Fin[2].r) >> 2; \
s2_i = (Fin[0].i - Fin[2].i) >> 2; \
tmp_r = (Fin[0].r + Fin[2].r) >> 2; \
tmp_i = (Fin[0].i + Fin[2].i) >> 2; \
s0_r = (Fin[1].r + Fin[3].r) >> 2; \
s0_i = (Fin[1].i + Fin[3].i) >> 2; \
s1_r = (Fin[1].r - Fin[3].r) >> 2; \
s1_i = (Fin[1].i - Fin[3].i) >> 2;

Definition at line 54 of file NE10_fft_int32.neonintrinsic.c.

#define FFT4_FS_START
Value:
ne10_int32_t s0_r, s0_i, s1_r, s1_i, s2_r, s2_i; \
ne10_int32_t tmp_r, tmp_i;
ne10_int32_t
int32_t ne10_int32_t
Definition: NE10_types.h:76

Definition at line 39 of file NE10_fft_int32.neonintrinsic.c.

#define FFT4_FWD_LS
Value:
Fout[2].r = tmp_r - s0_r; \
Fout[2].i = tmp_i - s0_i; \
Fout[0].r = tmp_r + s0_r; \
Fout[0].i = tmp_i + s0_i; \
Fout[1].r = s2_r + s1_i; \
Fout[1].i = s2_i - s1_r; \
Fout[3].r = s2_r - s1_i; \
Fout[3].i = s2_i + s1_r;

Definition at line 64 of file NE10_fft_int32.neonintrinsic.c.

#define FFT4_INV_LS
Value:
Fout[2].r = tmp_r - s0_r; \
Fout[2].i = tmp_i - s0_i; \
Fout[0].r = tmp_r + s0_r; \
Fout[0].i = tmp_i + s0_i; \
Fout[1].r = s2_r - s1_i; \
Fout[1].i = s2_i + s1_r; \
Fout[3].r = s2_r + s1_i; \
Fout[3].i = s2_i - s1_r;

Definition at line 74 of file NE10_fft_int32.neonintrinsic.c.

#define FFT8_FS
Value:
s0_r = Fin[0].r + Fin[4].r; \
s0_i = Fin[0].i + Fin[4].i; \
s1_r = Fin[0].r - Fin[4].r; \
s1_i = Fin[0].i - Fin[4].i; \
s2_r = Fin[1].r + Fin[5].r; \
s2_i = Fin[1].i + Fin[5].i; \
s3_r = Fin[1].r - Fin[5].r; \
s3_i = Fin[1].i - Fin[5].i; \
s4_r = Fin[2].r + Fin[6].r; \
s4_i = Fin[2].i + Fin[6].i; \
s5_r = Fin[2].r - Fin[6].r; \
s5_i = Fin[2].i - Fin[6].i; \
s6_r = Fin[3].r + Fin[7].r; \
s6_i = Fin[3].i + Fin[7].i; \
s7_r = Fin[3].r - Fin[7].r; \
s7_i = Fin[3].i - Fin[7].i;

Definition at line 124 of file NE10_fft_int32.neonintrinsic.c.

#define FFT8_FS_SCALED
Value:
s0_r = (Fin[0].r + Fin[4].r) >> 3; \
s0_i = (Fin[0].i + Fin[4].i) >> 3; \
s1_r = (Fin[0].r - Fin[4].r) >> 3; \
s1_i = (Fin[0].i - Fin[4].i) >> 3; \
s2_r = (Fin[1].r + Fin[5].r) >> 3; \
s2_i = (Fin[1].i + Fin[5].i) >> 3; \
s3_r = (Fin[1].r - Fin[5].r) >> 3; \
s3_i = (Fin[1].i - Fin[5].i) >> 3; \
s4_r = (Fin[2].r + Fin[6].r) >> 3; \
s4_i = (Fin[2].i + Fin[6].i) >> 3; \
s5_r = (Fin[2].r - Fin[6].r) >> 3; \
s5_i = (Fin[2].i - Fin[6].i) >> 3; \
s6_r = (Fin[3].r + Fin[7].r) >> 3; \
s6_i = (Fin[3].i + Fin[7].i) >> 3; \
s7_r = (Fin[3].r - Fin[7].r) >> 3; \
s7_i = (Fin[3].i - Fin[7].i) >> 3;

Definition at line 142 of file NE10_fft_int32.neonintrinsic.c.

#define FFT8_FS_START
Value:
ne10_int32_t s0_r, s0_i, s1_r, s1_i, s2_r, s2_i, s3_r, s3_i, s4_r, s4_i, s5_r, s5_i, s6_r, s6_i, s7_r, s7_i; \
ne10_int32_t t0_r, t0_i, t1_r, t1_i, t2_r, t2_i, t3_r, t3_i, t4_r, t4_i, t5_r, t5_i; \
const ne10_int32_t TW_81 = 1518500249;
ne10_int32_t
int32_t ne10_int32_t
Definition: NE10_types.h:76

Definition at line 119 of file NE10_fft_int32.neonintrinsic.c.

#define FFT8_FWD_LS

Definition at line 161 of file NE10_fft_int32.neonintrinsic.c.

#define FFT8_INV_LS

Definition at line 199 of file NE10_fft_int32.neonintrinsic.c.

#define ne10_mixed_radix_fft_backward_int32_neon (   scaled)

Definition at line 1324 of file NE10_fft_int32.neonintrinsic.c.

#define ne10_mixed_radix_fft_forward_int32_neon (   scaled)

Definition at line 1240 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_LOAD
Value:
q2_in0 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in1 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in2 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in3 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_tw0 = vld2q_s32 (p_tw); \
p_tw += tw_step; \
q2_tw1 = vld2q_s32 (p_tw); \
p_tw += tw_step; \
q2_tw2 = vld2q_s32 (p_tw); \
q_s1_r = vqdmulhq_s32 (q2_in1.val[0], q2_tw0.val[0]); \
q_s1_i = vqdmulhq_s32 (q2_in1.val[1], q2_tw0.val[0]); \
q_s2_r = vqdmulhq_s32 (q2_in2.val[0], q2_tw1.val[0]); \
q_s2_i = vqdmulhq_s32 (q2_in2.val[1], q2_tw1.val[0]); \
q_s3_r = vqdmulhq_s32 (q2_in3.val[0], q2_tw2.val[0]); \
q_s3_i = vqdmulhq_s32 (q2_in3.val[1], q2_tw2.val[0]); \
q_tmp0 = vqdmulhq_s32 (q2_in1.val[1], q2_tw0.val[1]); \
q_tmp1 = vqdmulhq_s32 (q2_in1.val[0], q2_tw0.val[1]); \
q_tmp2 = vqdmulhq_s32 (q2_in2.val[1], q2_tw1.val[1]); \
q_tmp3 = vqdmulhq_s32 (q2_in2.val[0], q2_tw1.val[1]); \
q_tmp4 = vqdmulhq_s32 (q2_in3.val[1], q2_tw2.val[1]); \
q_tmp5 = vqdmulhq_s32 (q2_in3.val[0], q2_tw2.val[1]);

Definition at line 1043 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_LS_02
Value:
q_s4_r = vaddq_s32 (q2_in0.val[0], q_s2_r); \
q_s4_i = vaddq_s32 (q2_in0.val[1], q_s2_i); \
q_s5_r = vsubq_s32 (q2_in0.val[0], q_s2_r); \
q_s5_i = vsubq_s32 (q2_in0.val[1], q_s2_i); \
q_s6_r = vaddq_s32 (q_s1_r, q_s3_r); \
q_s6_i = vaddq_s32 (q_s1_i, q_s3_i); \
q_s7_r = vsubq_s32 (q_s1_r, q_s3_r); \
q_s7_i = vsubq_s32 (q_s1_i, q_s3_i); \
q2_out2.val[0] = vsubq_s32 (q_s4_r, q_s6_r); \
q2_out2.val[1] = vsubq_s32 (q_s4_i, q_s6_i); \
q2_out0.val[0] = vaddq_s32 (q_s4_r, q_s6_r); \
q2_out0.val[1] = vaddq_s32 (q_s4_i, q_s6_i);

Definition at line 1100 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_LS_02_SCALED
Value:
q_s4_r = vhaddq_s32 (q2_in0.val[0], q_s2_r); \
q_s4_i = vhaddq_s32 (q2_in0.val[1], q_s2_i); \
q_s5_r = vhsubq_s32 (q2_in0.val[0], q_s2_r); \
q_s5_i = vhsubq_s32 (q2_in0.val[1], q_s2_i); \
q_s6_r = vhaddq_s32 (q_s1_r, q_s3_r); \
q_s6_i = vhaddq_s32 (q_s1_i, q_s3_i); \
q_s7_r = vhsubq_s32 (q_s1_r, q_s3_r); \
q_s7_i = vhsubq_s32 (q_s1_i, q_s3_i); \
q2_out2.val[0] = vhsubq_s32 (q_s4_r, q_s6_r); \
q2_out2.val[1] = vhsubq_s32 (q_s4_i, q_s6_i); \
q2_out0.val[0] = vhaddq_s32 (q_s4_r, q_s6_r); \
q2_out0.val[1] = vhaddq_s32 (q_s4_i, q_s6_i);

Definition at line 1114 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_S1_FWD
Value:
q_s1_r = vsubq_s32 (q_s1_r, q_tmp0); \
q_s1_i = vaddq_s32 (q_s1_i, q_tmp1); \
q_s2_r = vsubq_s32 (q_s2_r, q_tmp2); \
q_s2_i = vaddq_s32 (q_s2_i, q_tmp3); \
q_s3_r = vsubq_s32 (q_s3_r, q_tmp4); \
q_s3_i = vaddq_s32 (q_s3_i, q_tmp5);

Definition at line 1083 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_S1_INV
Value:
q_s1_r = vaddq_s32 (q_s1_r, q_tmp0); \
q_s1_i = vsubq_s32 (q_s1_i, q_tmp1); \
q_s2_r = vaddq_s32 (q_s2_r, q_tmp2); \
q_s2_i = vsubq_s32 (q_s2_i, q_tmp3); \
q_s3_r = vaddq_s32 (q_s3_r, q_tmp4); \
q_s3_i = vsubq_s32 (q_s3_i, q_tmp5);

Definition at line 1091 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_START
Value:
ne10_int32_t m_count; \
ne10_int32_t src_step = src_stride << 1; \
ne10_int32_t dst_step = dst_stride << 1; \
ne10_int32_t tw_step = mstride << 1; \
int32_t *p_src, *p_dst, *p_tw; \
int32x4x2_t q2_in0, q2_in1, q2_in2, q2_in3; \
int32x4x2_t q2_tw0, q2_tw1, q2_tw2; \
int32x4_t q_s1_r, q_s1_i, q_s2_r, q_s2_i, q_s3_r, q_s3_i; \
int32x4_t q_tmp0, q_tmp1, q_tmp2, q_tmp3, q_tmp4, q_tmp5; \
int32x4_t q_s4_r, q_s4_i, q_s5_r, q_s5_i, q_s6_r, q_s6_i, q_s7_r, q_s7_i; \
int32x4x2_t q2_out0, q2_out1, q2_out2, q2_out3; \
p_src = (int32_t *) Fin; \
p_dst = (int32_t *) Fout; \
p_tw = (int32_t *) tw;
ne10_int32_t
int32_t ne10_int32_t
Definition: NE10_types.h:76

Definition at line 1027 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITH_TW_STORE
Value:
vst2q_s32 (p_dst, q2_out0); \
p_dst += dst_step; \
vst2q_s32 (p_dst, q2_out1); \
p_dst += dst_step; \
vst2q_s32 (p_dst, q2_out2); \
p_dst += dst_step; \
vst2q_s32 (p_dst, q2_out3); \
p_dst += dst_step; \
p_src = p_src - src_step * 4 + 8; \
p_dst = p_dst - dst_step * 4 + 8; \
p_tw = p_tw - tw_step * 2 + 8;

Definition at line 1070 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITHOUT_TW_LOAD
Value:
q2_in0 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in1 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in2 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in3 = vld2q_s32 (p_src); \
p_src += src_step;

Definition at line 873 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITHOUT_TW_S0
Value:
q_s0_r = vaddq_s32 (q2_in0.val[0], q2_in2.val[0]); \
q_s0_i = vaddq_s32 (q2_in0.val[1], q2_in2.val[1]); \
q_s1_r = vsubq_s32 (q2_in0.val[0], q2_in2.val[0]); \
q_s1_i = vsubq_s32 (q2_in0.val[1], q2_in2.val[1]); \
q_s2_r = vaddq_s32 (q2_in1.val[0], q2_in3.val[0]); \
q_s2_i = vaddq_s32 (q2_in1.val[1], q2_in3.val[1]); \
q_s3_r = vsubq_s32 (q2_in1.val[0], q2_in3.val[0]); \
q_s3_i = vsubq_s32 (q2_in1.val[1], q2_in3.val[1]); \
q_out2_r = vsubq_s32 (q_s0_r, q_s2_r); \
q_out2_i = vsubq_s32 (q_s0_i, q_s2_i); \
q_out0_r = vaddq_s32 (q_s0_r, q_s2_r); \
q_out0_i = vaddq_s32 (q_s0_i, q_s2_i);

Definition at line 906 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITHOUT_TW_S0_SCALED
Value:
q_s0_r = vhaddq_s32 (q2_in0.val[0], q2_in2.val[0]); \
q_s0_i = vhaddq_s32 (q2_in0.val[1], q2_in2.val[1]); \
q_s1_r = vhsubq_s32 (q2_in0.val[0], q2_in2.val[0]); \
q_s1_i = vhsubq_s32 (q2_in0.val[1], q2_in2.val[1]); \
q_s2_r = vhaddq_s32 (q2_in1.val[0], q2_in3.val[0]); \
q_s2_i = vhaddq_s32 (q2_in1.val[1], q2_in3.val[1]); \
q_s3_r = vhsubq_s32 (q2_in1.val[0], q2_in3.val[0]); \
q_s3_i = vhsubq_s32 (q2_in1.val[1], q2_in3.val[1]); \
q_out2_r = vhsubq_s32 (q_s0_r, q_s2_r); \
q_out2_i = vhsubq_s32 (q_s0_i, q_s2_i); \
q_out0_r = vhaddq_s32 (q_s0_r, q_s2_r); \
q_out0_i = vhaddq_s32 (q_s0_i, q_s2_i);

Definition at line 920 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITHOUT_TW_START
Value:
ne10_int32_t f_count; \
ne10_int32_t src_step = stride << 1; \
int32_t *p_src, *p_dst; \
int32x4x2_t q2_in0, q2_in1, q2_in2, q2_in3; \
int32x4_t q_s0_r, q_s0_i, q_s1_r, q_s1_i, q_s2_r, q_s2_i, q_s3_r, q_s3_i; \
int32x4_t q_out0_r, q_out0_i, q_out1_r, q_out1_i, q_out2_r, q_out2_i, q_out3_r, q_out3_i; \
int32x4x2_t q2_tmp0, q2_tmp1, q2_tmp2, q2_tmp3; \
int32x4x2_t q2_out0, q2_out1, q2_out2, q2_out3; \
p_src = (int32_t *) Fin; \
p_dst = (int32_t *) Fout;
ne10_int32_t
int32_t ne10_int32_t
Definition: NE10_types.h:76

Definition at line 861 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX4x4_WITHOUT_TW_STORE
Value:
q2_tmp0 = vtrnq_s32 (q_out0_r, q_out1_r); \
q2_tmp1 = vtrnq_s32 (q_out0_i, q_out1_i); \
q2_tmp2 = vtrnq_s32 (q_out2_r, q_out3_r); \
q2_tmp3 = vtrnq_s32 (q_out2_i, q_out3_i); \
q2_out0.val[0] = vcombine_s32 (vget_low_s32 (q2_tmp0.val[0]), vget_low_s32 (q2_tmp2.val[0])); \
q2_out0.val[1] = vcombine_s32 (vget_low_s32 (q2_tmp1.val[0]), vget_low_s32 (q2_tmp3.val[0])); \
q2_out1.val[0] = vcombine_s32 (vget_low_s32 (q2_tmp0.val[1]), vget_low_s32 (q2_tmp2.val[1])); \
q2_out1.val[1] = vcombine_s32 (vget_low_s32 (q2_tmp1.val[1]), vget_low_s32 (q2_tmp3.val[1])); \
q2_out2.val[0] = vcombine_s32 (vget_high_s32 (q2_tmp0.val[0]), vget_high_s32 (q2_tmp2.val[0])); \
q2_out2.val[1] = vcombine_s32 (vget_high_s32 (q2_tmp1.val[0]), vget_high_s32 (q2_tmp3.val[0])); \
q2_out3.val[0] = vcombine_s32 (vget_high_s32 (q2_tmp0.val[1]), vget_high_s32 (q2_tmp2.val[1])); \
q2_out3.val[1] = vcombine_s32 (vget_high_s32 (q2_tmp1.val[1]), vget_high_s32 (q2_tmp3.val[1])); \
vst2q_s32 (p_dst, q2_out0); \
p_dst += 8; \
vst2q_s32 (p_dst, q2_out1); \
p_dst += 8; \
vst2q_s32 (p_dst, q2_out2); \
p_dst += 8; \
vst2q_s32 (p_dst, q2_out3); \
p_dst += 8; \
p_src = p_src - src_step * 4 + 8;

Definition at line 883 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_FS_S0
Value:
q_sin0_r = vaddq_s32 (q2_in0.val[0], q2_in1.val[0]); \
q_sin0_i = vaddq_s32 (q2_in0.val[1], q2_in1.val[1]); \
q_sin1_r = vsubq_s32 (q2_in0.val[0], q2_in1.val[0]); \
q_sin1_i = vsubq_s32 (q2_in0.val[1], q2_in1.val[1]); \
q_sin2_r = vaddq_s32 (q2_in2.val[0], q2_in3.val[0]); \
q_sin2_i = vaddq_s32 (q2_in2.val[1], q2_in3.val[1]); \
q_sin3_r = vsubq_s32 (q2_in2.val[0], q2_in3.val[0]); \
q_sin3_i = vsubq_s32 (q2_in2.val[1], q2_in3.val[1]); \
q_sin4_r = vaddq_s32 (q2_in4.val[0], q2_in5.val[0]); \
q_sin4_i = vaddq_s32 (q2_in4.val[1], q2_in5.val[1]); \
q_sin5_r = vsubq_s32 (q2_in4.val[0], q2_in5.val[0]); \
q_sin5_i = vsubq_s32 (q2_in4.val[1], q2_in5.val[1]); \
q_sin6_r = vaddq_s32 (q2_in6.val[0], q2_in7.val[0]); \
q_sin6_i = vaddq_s32 (q2_in6.val[1], q2_in7.val[1]); \
q_sin7_r = vsubq_s32 (q2_in6.val[0], q2_in7.val[0]); \
q_sin7_i = vsubq_s32 (q2_in6.val[1], q2_in7.val[1]);

Definition at line 632 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_FS_S0_SCALED
Value:
q_sin0_r = vhaddq_s32 (q2_in0.val[0], q2_in1.val[0]); \
q_sin0_i = vhaddq_s32 (q2_in0.val[1], q2_in1.val[1]); \
q_sin1_r = vhsubq_s32 (q2_in0.val[0], q2_in1.val[0]); \
q_sin1_i = vhsubq_s32 (q2_in0.val[1], q2_in1.val[1]); \
q_sin2_r = vhaddq_s32 (q2_in2.val[0], q2_in3.val[0]); \
q_sin2_i = vhaddq_s32 (q2_in2.val[1], q2_in3.val[1]); \
q_sin3_r = vhsubq_s32 (q2_in2.val[0], q2_in3.val[0]); \
q_sin3_i = vhsubq_s32 (q2_in2.val[1], q2_in3.val[1]); \
q_sin4_r = vhaddq_s32 (q2_in4.val[0], q2_in5.val[0]); \
q_sin4_i = vhaddq_s32 (q2_in4.val[1], q2_in5.val[1]); \
q_sin5_r = vhsubq_s32 (q2_in4.val[0], q2_in5.val[0]); \
q_sin5_i = vhsubq_s32 (q2_in4.val[1], q2_in5.val[1]); \
q_sin6_r = vhaddq_s32 (q2_in6.val[0], q2_in7.val[0]); \
q_sin6_i = vhaddq_s32 (q2_in6.val[1], q2_in7.val[1]); \
q_sin7_r = vhsubq_s32 (q2_in6.val[0], q2_in7.val[0]); \
q_sin7_i = vhsubq_s32 (q2_in6.val[1], q2_in7.val[1]);

Definition at line 704 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_FWD_S357
Value:
q_tw_81 = vdupq_n_s32 (TW_81); \
q_tw_81n = vdupq_n_s32 (TW_81N); \
q_s5_r = q_sin5_i; \
q_s5_i = vnegq_s32 (q_sin5_r); \
q_s3_r = vaddq_s32 (q_sin3_r, q_sin3_i); \
q_s3_i = vsubq_s32 (q_sin3_i, q_sin3_r); \
q_s7_r = vsubq_s32 (q_sin7_r, q_sin7_i); \
q_s7_i = vaddq_s32 (q_sin7_i, q_sin7_r); \
q_s3_r = vqdmulhq_s32 (q_s3_r, q_tw_81); \
q_s3_i = vqdmulhq_s32 (q_s3_i, q_tw_81); \
q_s7_r = vqdmulhq_s32 (q_s7_r, q_tw_81n); \
q_s7_i = vqdmulhq_s32 (q_s7_i, q_tw_81n);

Definition at line 650 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_INV_S357
Value:
q_tw_81 = vdupq_n_s32 (TW_81); \
q_tw_81n = vdupq_n_s32 (TW_81N); \
q_s5_r = vnegq_s32 (q_sin5_i); \
q_s5_i = q_sin5_r; \
q_s3_r = vsubq_s32 (q_sin3_r, q_sin3_i); \
q_s3_i = vaddq_s32 (q_sin3_i, q_sin3_r); \
q_s7_r = vaddq_s32 (q_sin7_r, q_sin7_i); \
q_s7_i = vsubq_s32 (q_sin7_i, q_sin7_r); \
q_s3_r = vqdmulhq_s32 (q_s3_r, q_tw_81); \
q_s3_i = vqdmulhq_s32 (q_s3_i, q_tw_81); \
q_s7_r = vqdmulhq_s32 (q_s7_r, q_tw_81n); \
q_s7_i = vqdmulhq_s32 (q_s7_i, q_tw_81n);

Definition at line 664 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_LOAD
Value:
q2_in0 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in2 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in4 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in6 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in1 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in3 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in5 = vld2q_s32 (p_src); \
p_src += src_step; \
q2_in7 = vld2q_s32 (p_src); \
p_src += src_step;

Definition at line 571 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_LS_02
Value:
q_s8_r = vaddq_s32 (q_sin0_r, q_sin4_r); \
q_s8_i = vaddq_s32 (q_sin0_i, q_sin4_i); \
q_s9_r = vaddq_s32 (q_sin1_r, q_s5_r); \
q_s9_i = vaddq_s32 (q_sin1_i, q_s5_i); \
q_s10_r = vsubq_s32 (q_sin0_r, q_sin4_r); \
q_s10_i = vsubq_s32 (q_sin0_i, q_sin4_i); \
q_s11_r = vsubq_s32 (q_sin1_r, q_s5_r); \
q_s11_i = vsubq_s32 (q_sin1_i, q_s5_i); \
q_s12_r = vaddq_s32 (q_sin2_r, q_sin6_r); \
q_s12_i = vaddq_s32 (q_sin2_i, q_sin6_i); \
q_s13_r = vaddq_s32 (q_s3_r, q_s7_r); \
q_s13_i = vaddq_s32 (q_s3_i, q_s7_i); \
q_s14_r = vsubq_s32 (q_sin2_r, q_sin6_r); \
q_s14_i = vsubq_s32 (q_sin2_i, q_sin6_i); \
q_s15_r = vsubq_s32 (q_s3_r, q_s7_r); \
q_s15_i = vsubq_s32 (q_s3_i, q_s7_i); \
q_out4_r = vsubq_s32 (q_s8_r, q_s12_r); \
q_out4_i = vsubq_s32 (q_s8_i, q_s12_i); \
q_out5_r = vsubq_s32 (q_s9_r, q_s13_r); \
q_out5_i = vsubq_s32 (q_s9_i, q_s13_i); \
q_out0_r = vaddq_s32 (q_s8_r, q_s12_r); \
q_out0_i = vaddq_s32 (q_s8_i, q_s12_i); \
q_out1_r = vaddq_s32 (q_s9_r, q_s13_r); \
q_out1_i = vaddq_s32 (q_s9_i, q_s13_i);

Definition at line 678 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_LS_02_SCALED
Value:
q_s8_r = vhaddq_s32 (q_sin0_r, q_sin4_r); \
q_s8_i = vhaddq_s32 (q_sin0_i, q_sin4_i); \
q_s9_r = vhaddq_s32 (q_sin1_r, q_s5_r); \
q_s9_i = vhaddq_s32 (q_sin1_i, q_s5_i); \
q_s10_r = vhsubq_s32 (q_sin0_r, q_sin4_r); \
q_s10_i = vhsubq_s32 (q_sin0_i, q_sin4_i); \
q_s11_r = vhsubq_s32 (q_sin1_r, q_s5_r); \
q_s11_i = vhsubq_s32 (q_sin1_i, q_s5_i); \
q_s12_r = vhaddq_s32 (q_sin2_r, q_sin6_r); \
q_s12_i = vhaddq_s32 (q_sin2_i, q_sin6_i); \
q_s13_r = vhaddq_s32 (q_s3_r, q_s7_r); \
q_s13_i = vhaddq_s32 (q_s3_i, q_s7_i); \
q_s14_r = vhsubq_s32 (q_sin2_r, q_sin6_r); \
q_s14_i = vhsubq_s32 (q_sin2_i, q_sin6_i); \
q_s15_r = vhsubq_s32 (q_s3_r, q_s7_r); \
q_s15_i = vhsubq_s32 (q_s3_i, q_s7_i); \
q_out4_r = vhsubq_s32 (q_s8_r, q_s12_r); \
q_out4_i = vhsubq_s32 (q_s8_i, q_s12_i); \
q_out5_r = vhsubq_s32 (q_s9_r, q_s13_r); \
q_out5_i = vhsubq_s32 (q_s9_i, q_s13_i); \
q_out0_r = vhaddq_s32 (q_s8_r, q_s12_r); \
q_out0_i = vhaddq_s32 (q_s8_i, q_s12_i); \
q_out1_r = vhaddq_s32 (q_s9_r, q_s13_r); \
q_out1_i = vhaddq_s32 (q_s9_i, q_s13_i);

Definition at line 722 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_START
Value:
ne10_int32_t f_count; \
ne10_int32_t src_step = stride << 1; \
const ne10_int32_t TW_81 = 1518500249; \
const ne10_int32_t TW_81N = -1518500249; \
int32_t *p_src, *p_dst; \
int32x4x2_t q2_in0, q2_in1, q2_in2, q2_in3, q2_in4, q2_in5, q2_in6, q2_in7; \
int32x4_t q_sin0_r, q_sin0_i, q_sin1_r, q_sin1_i, q_sin2_r, q_sin2_i, q_sin3_r, q_sin3_i; \
int32x4_t q_sin4_r, q_sin4_i, q_sin5_r, q_sin5_i, q_sin6_r, q_sin6_i, q_sin7_r, q_sin7_i; \
int32x4_t q_s3_r, q_s3_i, q_s5_r, q_s5_i, q_s7_r, q_s7_i; \
int32x4_t q_s8_r, q_s8_i, q_s9_r, q_s9_i, q_s10_r, q_s10_i, q_s11_r, q_s11_i; \
int32x4_t q_s12_r, q_s12_i, q_s13_r, q_s13_i, q_s14_r, q_s14_i, q_s15_r, q_s15_i; \
int32x4_t q_out0_r, q_out0_i, q_out1_r, q_out1_i, q_out2_r, q_out2_i, q_out3_r, q_out3_i; \
int32x4_t q_out4_r, q_out4_i, q_out5_r, q_out5_i, q_out6_r, q_out6_i, q_out7_r, q_out7_i; \
int32x4x2_t q2_tmp0, q2_tmp1, q2_tmp2, q2_tmp3, q2_tmp4, q2_tmp5, q2_tmp6, q2_tmp7; \
int32x4x2_t q2_out0, q2_out1, q2_out2, q2_out3, q2_out4, q2_out5, q2_out6, q2_out7; \
int32x4_t q_tw_81, q_tw_81n; \
p_src = (int32_t *) Fin; \
p_dst = (int32_t *) Fout;
ne10_int32_t
int32_t ne10_int32_t
Definition: NE10_types.h:76

Definition at line 550 of file NE10_fft_int32.neonintrinsic.c.

#define RADIX8x4_STORE

Definition at line 589 of file NE10_fft_int32.neonintrinsic.c.

Function Documentation

ne10_mixed_radix_fft_forward_int32_neon ( ne10_mixed_radix_fft_forward_int32_neon (scaled)ne10_mixed_radix_fft_backward_int32_neon ()ne10_mixed_radix_fft_backward_int32_neon (scaled)static void ne10_fft_split_r2c_1d_int32_neon (ne10_fft_cpx_int32_t *dst  unscaled)

Definition at line 1408 of file NE10_fft_int32.neonintrinsic.c.

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